As computer systems evolve, so does the demand for increased speed and performance. Since semiconductor packages (also known as integrated circuit (IC) or chip packages) continue to have a significant effect on system performance, packaging design has also continued to evolve to keep pace with the demand for increased performance. In fact, as system frequency and edge-rate speeds increase, package effects have become increasingly significant. These package effects present system designers with numerous challenges when designing packages. For example, system designers need to take into consideration: trace impedance, crosstalk, skew and mostly impedance discontinuities at the semiconductor-to-substrate interface, at the substrate itself and at the substrate-to-PCB (printed circuit board) interface.
The semiconductor-to-substrate interface in ball grid array (BGA) packages is usually made via bonding wires or flip-chip bumps. This creates impedance discontinuities at the semiconductor-to-substrate interface, which may be minimized with lower bump heights or shorter wire lengths. Similarly, solder balls at the substrate-to-PCB board interface also cause impedance discontinuities, which may be controlled using anti-pads on the substrate and/or PCB. However, these lower bump heights, shorter wire lengths or anti-pads increase design complexity and may not be suitable for some package constructions.
Furthermore, vias and dielectric materials used in conventional, low cost, laminate substrates also create problems for high-speed signaling. For example, through-hole vias that extend through multi-layer substrates often form unused portions or stubs that add parasitic capacitance and produce signal reflections, both of which degrade signal quality. Although back-drilling and other techniques may be used to reduce the stub portions of the vias, such efforts further increase manufacturing costs and may not be suitable or possible for some package constructions. More recently, ceramic substrates with smaller vias or substrates with controllable build-up layers and smaller vias have been used in BGA packages to control the impedance discontinuities for high-speed signals. However, these new substrates are usually very expensive. Accordingly, current substrates are either lost cost with low performance or high cost with high performance. Accordingly, a high performance, but low cost, substrate to be used in a semiconductor package would be highly desirable.
Moreover, as current package designs may include both high-speed and low-speed signals, not all of the signals require the detailed design attention given to high-speed signals. Accordingly, a system that only addresses package effects for high-speed signals would be highly desirable.
Like reference numerals refer to the same or similar components throughout the several views of the drawings.